Buck Converter Design for Minimum EMI

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For buck converters, the inductor/diode/FET net is the high dv/dt net.  Minimize the area of this net to reduce its coupling to the outside world.

The labeled di/dt loop isn't the only current loop in this circuit (Figure 1), but often it is the most problematic.  This loop has very fast changing currents, particularly the leg with the diode in it.  This part of the loop goes from zero to full current very quickly when Q1 turns off.  At the beginning of the cycle, Q1 is switched on to drive current through L1, thus storing energy in its magnetic field.  The current flows through Q1, L1, and the caps.  D1 isn't involved.  When Q1 is switched off, L1 won't allow the current to stop if there is any possible way to keep going.  D1 provides such a way (path) to keep the current flowing.  For example, if Q1 is turned on and the current through L1 and Q1 ramps up to 1 A, and then Q1 is switched off in 50 ns, the current through D1 goes from zero to 1 A in 50 ns.  That's a pretty fast di/dt!  Route this net carefully. 

Some controllers put D1 (maybe also Q1) inside the IC itself, such as ADP2442 from Analog Devices.

This is a good thing from an EMC standpoint generally.  It allows much smaller keep loop areas than would otherwise be possible using discrete diodes and FETs.  Speaking of discrete components, some designs use another FET instead of D1 to improve efficiency.  These are "synchronous" buck converters because they have to synchronize the switching of the two FETs to maximize efficiency and to prevent shorting Vin to ground by having both FETs on at once.  However, the current loops and the topology are the same.

More information on minimizing EMI in switching converter circuits is available here.

Image of buck converter fast dv/dt and di/dt areas

Figure 1:  Buck converter fast dv/dt and di/dt areas.

 
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