STGIPN3H60AT Datasheet by STMicroelectronics

‘ nienugmented S ND‘PVZGL

September 2016

DocID026945 Rev 2

1/19

This is information on a product in full production.

www.st.com

STGIPN3H60AT

SLLIMM™-nano small low-loss intelligent molded module

IPM, 3 A, 600 V, 3-phase IGBT inverter bridge

Datasheet - production data

Features

 IPM 3 A, 600 V, 3-phase IGBT inverter

bridge including control ICs for gate driving

and freewheeling diodes

 Optimized for low electromagnetic

interference

 VCE(sat) negative temperature coefficient

 3.3 V, 5 V, 15 V CMOS/TTL inputs

comparators with hysteresis and pull-down

resistors

 Undervoltage lockout

 Internal bootstrap diode

 Interlocking function

 Optimized pinout for easy board layout

 85 kΩ NTC for temperature control (UL1434

CA 2 and 4)

Applications

 3-phase inverters for motor drives

 Dish washers, refrigerator compressors,

heating systems, air-conditioning fans,

draining and recirculation pumps

Description

This intelligent power module implements a

compact, high performance AC motor drive in a

simple, rugged design. It is composed of six

IGBTs with freewheeling diodes and three half-

bridge HVICs for gate driving, providing low

electromagnetic interference (EMI) characteristics

with optimized switching speed. The package is

optimized for thermal performance and

compactness in built-in motor applications, or

other low power applications where assembly

space is limited. This IPM includes an operational

amplifier, completely uncommitted, and a

comparator that can be used to design a fast and

efficient protection circuit. SLLIMM™ is a

trademark of STMicroelectronics.

Table 1: Device summary

Order code

Marking

Package

Packing

STGIPN3H60AT

GIPN3H60AT

NDIP-26L

Tube

Contents

STGIPN3H60AT

2/19

DocID026945 Rev 2

Contents

1 Internal schematic diagram and pin configuration ....................... 3

2 Electrical ratings ............................................................................. 6

2.1 Absolute maximum ratings ................................................................ 6

2.2 Thermal data ..................................................................................... 6

3 Electrical characteristics ................................................................ 7

3.1 Inverter part ....................................................................................... 7

3.2 Control part ....................................................................................... 9

3.2.1 NTC thermistor ................................................................................. 10

4 Application circuit example .......................................................... 12

4.1 Guidelines ....................................................................................... 13

5 Package information ..................................................................... 14

5.1 NDIP-26L type C package information ............................................ 15

5.2 NDIP-26L packing information ........................................................ 17

6 Revision history ............................................................................ 18

GND (1) T (2) VocW (a) HIN w (4) LIN W (5) T (5) NC (7) NC (8) Vac v (e) HIN V (10) qum) NC (12) We U (13) HIN U (14) T(15) W U (16) N w (25) w‘ OUT w (25) Vbnm w (24) NV(23) v, OUT v (22p Vban 12‘) NU(20) U, ou‘ru (19) P (18) Vbum U [17! E]

STGIPN3H60AT

Internal schematic diagram and pin configuration

DocID026945 Rev 2

3/19

1 Internal schematic diagram and pin configuration

Figure 1: Internal schematic diagram

Internal schematic diagram and pin configuration

STGIPN3H60AT

4/19

DocID026945 Rev 2

Table 2: Pin description

Symbol

Description

1

GND

Ground

2

T

NTC thermistor terminal

3

VCC W

Low voltage power supply W phase

4

HIN W

High side logic input for W phase

5

LIN W

Low side logic input for W phase

6

T

NTC thermistor terminal

7

NC

Not connected

8

NC

Not connected

9

VCC V

Low voltage power supply V phase

10

HIN V

High side logic input for V phase

11

LIN V

Low side logic input for V phase

12

NC

Not connected

13

VCC U

Low voltage power supply for U phase

14

HIN U

High side logic input for U phase

15

T

NTC thermistor terminal

16

LIN U

Low side logic input for U phase

17

VBOOT U

Bootstrap voltage for U phase

18

P

Positive DC input

19

U

U phase output

20

NU

Negative DC input for U phase

21

VBOOT V

Bootstrap voltage for V phase

22

V

V phase output

23

NV

Negative DC input for V phase

24

VBOOT W

Bootstrap voltage for W phase

25

W

W phase output

26

NW

Negative DC input for W phase

ﬂﬂﬂﬂﬂﬂﬂﬂﬂﬂﬂﬂ

STGIPN3H60AT

Internal schematic diagram and pin configuration

DocID026945 Rev 2

5/19

Figure 2: Pin layout (top view)

(*) Dummy pin internally connected to P (positive DC input).

(*) (*)

PIN16

PIN17

PIN1

PIN26

PIN #1 ID

AM09368V1

T “max : M— m 7 1c CELsat)(max)(TJ[max)'|C(TC)) we) VT“

Electrical ratings

STGIPN3H60AT

6/19

DocID026945 Rev 2

2 Electrical ratings

2.1 Absolute maximum ratings

Table 3: Inverter part

Symbol

Parameter

Value

Unit

VCES

Each IGBT collector emitter voltage (VIN(1)= 0)

600

V

± IC(2)

Each IGBT continuous collector current at TC = 25°C

3

A

± ICP(3)

Each IGBT pulsed collector current

18

A

PTOT

Each IGBT total dissipation at TC = 25°C

8

W

Notes:

(1)Applied between HINi, LINi and GND for i = U, V, W.

(2)Calculated according to the iterative formula:

(3)Pulse width limited by max junction temperature.

Table 4: Control part

Symbol

Parameter

Min.

Max.

Unit

VOUT

Output voltage applied between OUTU, OUTV, OUTW -

GND

Vboot - 18

Vboot + 0.3

V

VCC

Low voltage power supply

- 0.3

18

V

Vboot

Bootstrap voltage

- 0.3

618

V

VIN

Logic input voltage applied between HINi, LINi and GND

for i = U, V, W

- 0.3

VCC + 0.3

V

∆VOUT/dT

Allowed output slew rate

50

V/ns

Table 5: Total system

Symbol

Parameter

Value

Unit

VISO

Isolation withstand voltage applied between each pin and

heatsink plate (AC voltage, t = 60 s.)

1000

V

Tj

Power chips operating junction temperature range

-40 to 150

°C

TC

Module operation case temperature range

-40 to 125

°C

2.2 Thermal data

Table 6: Thermal data

Symbol

Parameter

Value

Unit

RthJA

Thermal resistance junction-ambient

50

°C/W

STGIPN3H60AT

Electrical characteristics

DocID026945 Rev 2

7/19

3 Electrical characteristics

3.1 Inverter part

TJ = 25 °C unless otherwise specified.

Table 7: Static

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VCE(sat)

Collector-emitter

saturation voltage

VCC = Vboot = 15 V, VIN(1) = 0 to 5 V, IC = 1 A

-

2.15

2.6

V

VCC = Vboot = 15 V, VIN(1) = 0 to 5 V, IC = 1 A,

TJ = 125 °C

-

1.65

ICES

Collector-cut off current

(VIN(1) = 0 “logic state”)

VCE = 550 V, VCC = VBoot = 15 V

-

250

µA

VF

Diode forward voltage

VIN(1) = 0 “logic state”, IC = 1 A

-

1.7

V

Notes:

(1)Applied between HINi, LINi and GND for i = U, V, W (LIN inputs are active-low).

Table 8: Inductive load switching time and energy

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

ton(1)

Turn-on time

VDD = 300 V,

VCC = Vboot = 15 V,

VIN(2) = 0 to 5 V,

IC = 1 A

(see Figure 4: "Switching time definition")

-

275

-

ns

tc(on)(1)

Crossover time (on)

-

90

-

toff(1)

Turn-off time

-

890

-

tc(off)(1)

Crossover time (off)

-

125

-

trr

Reverse recovery time

-

50

-

Eon

Turn-on switching energy

-

18

-

µJ

Eoff

Turn-off switching energy

-

13

-

Notes:

(1)tON and tOFF include the propagation delay time of the internal drive. tC(ON) and tC(OFF) are the switching time of IGBT itself under

the internally given gate driving condition.

(2)Applied between HINi, LINi and GND for i = U, V, W (LIN inputs are active-low).

2 Ir 2X W W a ,J Ji \j‘ 1 no r -- 100%t mmk tn VCE Ic Ic A VCE ¥ V|V\ VIA to“ (on ([Low (@an Vwcm Hm [90%K ‘ 0%vcg \mom WW3 10%|c a turrron ( ) (b) mrn—off mommy

Electrical characteristics

STGIPN3H60AT

8/19

DocID026945 Rev 2

Figure 3: Switching time test circuit

Figure 4: Switching time definition

VBOOT>VCC

L

IC

VCE

VCC

INPUT

01

BUS

Lin

Hin

Vcc

LVG

HVG

OUT

BOOT

GND

STGIPN3H60AT

Electrical characteristics

DocID026945 Rev 2

9/19

3.2 Control part

Table 9: Low voltage power supply (VCC = 15 V unless otherwise specified)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VCC_thON

Undervoltage turn-on threshold

9.1

9.6

10.1

V

VCC_thOFF

Undervoltage turn-off threshold

7.9

8.3

8.8

V

VCC_hys

Undervoltage hystereses

0.9

V

Iqccu

Undervoltage quiescent supply current

VCC < 7.9 V

250

330

µA

Iqcc

Quiescent current

VCC = 15 V

350

450

µA

Table 10: Bootstrapped voltage (VCC = 15 V unless otherwise specified)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Vboot_thON

Undervoltage turn-on threshold

8.5

9.5

10.5

V

Vboot_thOFF

Undervoltage turn-off threshold

7.2

8.3

9.2

V

Vboothys

Undervoltage hystereses

0.9

V

Iqboot

Quiescent current

250

µA

RDS(on)

Bootstrap driver on-resistance

VCC > 12.5 V

125

Ω

Table 11: Logic inputs (VCC = 15 V unless otherwise specified)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Vil

Low level logic input voltage

1.1

V

Vih

High level logic input voltage

1.8

V

Iil

Low level logic input current (1)

VIN = 0 V (1)

-1

µA

Iih

High level logic input current (1)

VIN = 15 V (1)

20

70

µA

Dt

Dead time(2)

320

ns

Notes:

(1)Applied between HINi, LINi and GND for i = U, V, W

(2)See Figure 5: "Dead time and interlocking definition"

LIN HIN m ( , m ( LVG i ﬁ‘m K—I HVG lrterlozklng an(tion AM03794w (Fm

Electrical characteristics

STGIPN3H60AT

10/19

DocID026945 Rev 2

Figure 5: Dead time and interlocking definition

3.2.1 NTC thermistor

Table 12: NTC thermistor

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

R25

Resistance

T = 25 °C

85

kΩ

R100

Resistance

T = 100 °C

5388

Ω

B

B-constant

T = 25 °C to 100 °C

4092

K

T

Operating temperature

-25

125

°C

   





Where T are temperatures in Kelvins

Figure 6: NTC resistance vs. temperature

0

500

1.000

1.500

2.000

2.500

3.000

3.500

-40 -20 020 40 60 80 100 120 140

NTC [kΩ]

[°C]

Min

Max

Typ

GIPD17220131349FSR

YD

STGIPN3H60AT

Electrical characteristics

DocID026945 Rev 2

11/19

Figure 7: NTC resistance vs. temperature (zoom)

0

5

10

15

20

25

30

35

40

50 70 90 110 130 150

NTC [kΩ]

[°C]

Min

Max

Typ

GIPD17220131350FSR

Z ‘ a I: a \ f % W ‘ a a 5 ‘ n u u l; 1% 1* Ar 4 5 5 ¥ >—w ‘# ‘ ﬂ ‘2 . a ‘ g E—(E g E s i g 2 i a g g 4 i s; z a E E s i§ ! L E; 7* 4 ’7 , EU; 5 SJ a :Hh JHM’HM WNW ”HM x w 45H E g ‘ h gTW/HM‘ iU 3U 3U EU 5U i 3 i MICROCONTROLLER E

Application circuit example

STGIPN3H60AT

12/19

DocID026945 Rev 2

4 Application circuit example

Figure 8: Application circuit example

Application designers are free to use a different scheme according with the specifications

of the device.

STGIPN3H60AT

Application circuit example

DocID026945 Rev 2

13/19

4.1 Guidelines

 Input signals HIN, LIN are active-high logic. A 500 kΩ (typ.) pull-down resistor is built-

in for each input. To prevent input signal oscillation, the wiring of each input should be

as short as possible and the use of RC filters (R1, C1) on each input signal is

suggested. The filters should be done with a time constant of about 100ns and must

be placed as close as possible to the IPM input pins.

 The bypass capacitor Cvcc (aluminum or tantalum) is recommended to reduce the

transient circuit demand on the power supply. In addition, a decoupling capacitor C2

(from 100 to 220 nF, ceramic with low ESR) is suggested, to reduce high frequency

switching noise distributed on the power supply lines. It must be placed as close as

possible to each Vcc pin and in parallel to the bypass capacitor.

 The use of RC filter (RSF, CSF) for current monitoring is recommended to improve

noise immunity. The filter must be placed as close as possible to the microcontroller or

to the Op-amp.

 The decoupling capacitor C3 (from 100 to 220 nF, ceramic with low ESR), in parallel

to each Cboot, is recommended in order to filter high frequency disturbances.

 The Zener diodes DZ1 between the Vcc pins and GND and in parallel to each Cboot is

suggested in order to prevent overvoltage.

 The decoupling capacitor C4 (from 100 to 220 nF, ceramic with low ESR) in parallel to

the electrolytic capacitor Cvdc is recommended, in order to prevent surge destruction.

Both capacitors C4 and Cvdc should be placed as close as possible to the IPM (C4

has priority over Cvdc).

 By integrating an application-specific type HVIC inside the module, direct coupling to

the MCU terminals without an opto-coupler is possible.

 Low inductance shunt resistors should be used for phase leg current sensing.

 In order to avoid malfunctions, the wiring between N pins, the shunt resistor and

PWR_GND should be as short as possible.

 It is recommended to connect SGN_GND to PWR_GND at only one point (near the

terminal of shunt resistor), in order to avoid any malfunction due to power ground

fluctuation.

These guidelines are useful for application design to ensure the specifications of the

device. For further details, please refer to the relevant application note AN4043.

Table 13: Recommended operating conditions

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VPN

Supply voltage

Applied between P-Nu, Nv, Nw

300

500

V

VCC

Control supply voltage

Applied between VCC-GND

12

15

17

V

VBS

High side bias voltage

Applied between VBOOTi-OUTi

for i = U, V, W

11.5

17

V

tdead

Blanking time to prevent

Arm-short

For each input signal

1.5

µs

fPWM

PWM input signal

-40°C < Tc < 100 °C

-40°C < Tj < 125 °C

25

kHz

TC

Case operation

temperature

100

°C

Package information

STGIPN3H60AT

14/19

DocID026945 Rev 2

5 Package information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

STGIPN3H60AT

Package information

DocID026945 Rev 2

15/19

5.1 NDIP-26L type C package information

Figure 9: NDIP-26L type C package outline

8278949_7

Package information

STGIPN3H60AT

16/19

DocID026945 Rev 2

Table 14: NDIP-26L type C mechanical data

Dim.

mm

Min.

Typ.

Max.

A

4.40

A1

0.80

1.00

1.20

A2

3.00

3.10

3.20

A3

1.70

1.80

1.90

A4

5.70

5.90

6.10

b

0.53

0.72

b1

0.52

0.60

0.68

b2

0.83

1.02

b3

0.82

0.90

0.98

c

0.46

0.59

c1

0.45

0.50

0.55

D

29.05

29.15

29.25

D1

0.50

0.77

1.00

D2

0.35

0.53

0.70

D3

29.55

E

12.35

12.45

12.55

e

1.70

1.80

1.90

e1

2.40

2.50

2.60

eB1

16.10

16.40

16.70

eB2

21.18

21.48

21.78

L

1.24

1.39

1.54

m 2 mm Mewv-unku'vvhaw‘y-wemhﬁ in 2: m ‘ "mm mm: WWW w; um“ ‘ mmmm mm mimsarvr E]

STGIPN3H60AT

Package information

DocID026945 Rev 2

17/19

5.2 NDIP-26L packing information

Figure 10: NDIP-26L tube dimensions (dimensions are in mm)

Table 15: Shipping details

Parameter

Value

Base quantity

17 pcs

Bulk quantity

476 pcs

Notes:

8313150_3

Revision history

STGIPN3H60AT

18/19

DocID026945 Rev 2

6 Revision history

Table 16: Document revision history

Date

Revision

Changes

30-Sep-2014

1

Initial release.

13-Sep-2016

2

Updated Section 5.1: "NDIP-26L type C package information" and

Section 5.2: "NDIP-26L packing information"

Minor text changes

STGIPN3H60AT

DocID026945 Rev 2

19/19

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications , and

improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST

products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order

acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the

design of Purchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

STGIPN3H60AT Datasheet by STMicroelectronics

Products related to this Datasheet